Resumen
Celero Communications, Inc. / Software
Principal Design Validation & Test (DVT) Engineer
nueva
- Irvine, CA
- Modalidad no informada
- Lead
Suma si tenés
- inteligencia artificial
- growth marketing
- legal
La búsqueda
About The Role
Celero is seeking an experienced Principal Design Validation & Test (DVT) Engineer to lead post-silicon validation for next-generation coherent DSP ASICs powering AI and hyperscale optical networking. As a key member of our engineering team, you will play a critical role in enabling first silicon, driving silicon characterization, and ensuring product readiness for customer deploym
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