Resumen
Celero Communications, Inc. / Software
ASIC Design Engineer - Digital DSP Design & Analog/Mixed-Signal
nueva
- Ottawa, Ontario, Canada · San Jose, CA · +1
- Modalidad no informada
- Senior
- 5+ años de experiencia
Requisitos
- • 5+ años de experiencia
Suma si tenés
- python
La búsqueda
ASIC Design Engineer – DSP / Analog / SerDes
Celero Communications is an exciting and fast-growing semiconductor startup developing innovative technologies that power next-generation AI and data center infrastructure. Our products enable high-performance optical connectivity and next-generation optical transceivers and modems.
Celero is seeking a highly skilled and motivated ASIC Design Engineer
Los datos de requisitos los extrae Maru del aviso: ante cualquier duda, manda el aviso original.